433 research outputs found

    Algorithms and Hardware Co-Design of HEVC Intra Encoders

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    Digital video is becoming extremely important nowadays and its importance has greatly increased in the last two decades. Due to the rapid development of information and communication technologies, the demand for Ultra-High Definition (UHD) video applications is becoming stronger. However, the most prevalent video compression standard H.264/AVC released in 2003 is inefficient when it comes to UHD videos. The increasing desire for superior compression efficiency to H.264/AVC leads to the standardization of High Efficiency Video Coding (HEVC). Compared with the H.264/AVC standard, HEVC offers a double compression ratio at the same level of video quality or substantial improvement of video quality at the same video bitrate. Yet, HE-VC/H.265 possesses superior compression efficiency, its complexity is several times more than H.264/AVC, impeding its high throughput implementation. Currently, most of the researchers have focused merely on algorithm level adaptations of HEVC/H.265 standard to reduce computational intensity without considering the hardware feasibility. What’s more, the exploration of efficient hardware architecture design is not exhaustive. Only a few research works have been conducted to explore efficient hardware architectures of HEVC/H.265 standard. In this dissertation, we investigate efficient algorithm adaptations and hardware architecture design of HEVC intra encoders. We also explore the deep learning approach in mode prediction. From the algorithm point of view, we propose three efficient hardware-oriented algorithm adaptations, including mode reduction, fast coding unit (CU) cost estimation, and group-based CABAC (context-adaptive binary arithmetic coding) rate estimation. Mode reduction aims to reduce mode candidates of each prediction unit (PU) in the rate-distortion optimization (RDO) process, which is both computation-intensive and time-consuming. Fast CU cost estimation is applied to reduce the complexity in rate-distortion (RD) calculation of each CU. Group-based CABAC rate estimation is proposed to parallelize syntax elements processing to greatly improve rate estimation throughput. From the hardware design perspective, a fully parallel hardware architecture of HEVC intra encoder is developed to sustain UHD video compression at 4K@30fps. The fully parallel architecture introduces four prediction engines (PE) and each PE performs the full cycle of mode prediction, transform, quantization, inverse quantization, inverse transform, reconstruction, rate-distortion estimation independently. PU blocks with different PU sizes will be processed by the different prediction engines (PE) simultaneously. Also, an efficient hardware implementation of a group-based CABAC rate estimator is incorporated into the proposed HEVC intra encoder for accurate and high-throughput rate estimation. To take advantage of the deep learning approach, we also propose a fully connected layer based neural network (FCLNN) mode preselection scheme to reduce the number of RDO modes of luma prediction blocks. All angular prediction modes are classified into 7 prediction groups. Each group contains 3-5 prediction modes that exhibit a similar prediction angle. A rough angle detection algorithm is designed to determine the prediction direction of the current block, then a small scale FCLNN is exploited to refine the mode prediction

    Efficient Architecture of Variable Size HEVC 2D-DCT for FPGA Platforms

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    This study presents a design of two-dimensional (2D) discrete cosine transform (DCT) hardware architecture dedicated for High Efficiency Video Coding (HEVC) in field programmable gate array (FPGA) platforms. The proposed methodology efficiently proceeds 2D-DCT computation to fit internal components and characteristics of FPGA resources. A four-stage circuit architecture is developed to implement the proposed methodology. This architecture supports variable size of DCT computation, including 4×4, 8×8, 16×16, and 32×32. The proposed architecture has been implemented in System Verilog and synthesized in various FPGA platforms. Compared with existing related works in literature, this proposed architecture demonstrates significant advantages in hardware cost and performance improvement. The proposed architecture is able to sustain 4K@30fps ultra high definition (UHD) TV real-time encoding applications with a reduction of 31-64% in hardware cost

    Oil-Spill Pollution Remote Sensing by Synthetic Aperture Radar

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    Rapid Invasion of Spartina Alterniflora in the Coastal Zone of Mainland China: Spatiotemporal Patterns and Human Prevention

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    Given the extensive spread and ecological consequences of exotic Spartina alterniflora (S. alterniflora) over the coast of mainland China, monitoring its spatiotemporal invasion patterns is important for the sake of coastal ecosystem management and ecological security. In this study, Landsat series images from 1990 to 2015 were used to establish multi-temporal datasets for documenting the temporal dynamics of S. alterniflora invasion. Our observations revealed that S. alterniflora had a continuous expansion with the area increasing by 50,204 ha during the considered 25 years. The largest expansion was identified in Jiangsu Province during the period of 1990-2000, and in Zhejiang Province during the periods 2000-2010 and 2010-2015. Three noticeable hotspots for S. alterniflora invasion were Yancheng of Jiangsu, Chongming of Shanghai, and Ningbo of Zhejiang, and each had a net area increase larger than 5000 ha. Moreover, an obvious shrinkage of S. alterniflora was identified in three coastal cities including the city of Cangzhou of Hebei, Dongguan, and Jiangmen of Guangdong. S. alterniflora invaded mostly into mudflats (>93%) and shrank primarily due to aquaculture (55.5%). This study sheds light on the historical spatial patterns in S. alterniflora distribution and thus is helpful for understanding its invasion mechanism and invasive species management

    Surface water quality estimation using remote sensing in the Gulf of Finland and the Finnish Archipelago Sea

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    This thesis deals with surface water quality estimation using remote sensing in the Gulf of Finland and the Archipelago Sea. Satellite remote sensing of water and empirical algorithms for surface water quality variables in coastal waters in the Gulf of Finland and the Archipelago Sea are explained and results from the studies in the area are presented. Concurrent in situ surface water measurements, AISA data, Landsat TM data, ERS-2 SAR data, AVHRR and MODIS data were obtained for selected locations in the Gulf of Finland and the Archipelago Sea in August 1997 and from April to May 2000, respectively. The AISA, TM, SAR, AVHRR and MODIS data from locations of water samples were extracted and digital data were examined. Significant correlations were observed between digital data and surface water quality variables. Semi-empirical, simple and multivariate regression analyses, and neural network algorithms were developed and applied in the study area. Application of neural networks appears to yield a superior performance in modelling radiative transfer functions describing the relation between satellite observations and surface water characteristics. The results show that the estimated accuracy for major characteristics of surface waters using the neural network method is much better than retrieval by using regression analysis. Since radar observations of water are strongly affected by surface geometry but not by water quality, radar data should be useful to eliminate the effects of surface roughness from the results when combined with optical observations. However, our results suggest that microwave data improve estimation of water quality very little or not at all. The technique, however, should be examined with new data sets obtained under various weather and water quality conditions in order to estimate its feasibility for estimating surface water quality parameters in the Finnish coastal waters.reviewe
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